Recently, the communication speed set in microprocessors and on printed wiring boards that have microprocessors have been increasing every year. The communication speed in microprocessors and on printed wiring boards that have microprocessors have rapidly increased from, for example, Mbps to Gbps class.
FIG. 1 is a graph that represents a year by year increase in LSI operating frequencies. Along with the rise in LSI operating frequencies, printed wiring boards (substrates) with line length limitations are also being employed. The communication speeds set in printed wiring boards is 1.25 Gbps for gigabit Ethernet (registered trademark), 2.5 Gbps for PCI Express (registered trademark), and 1.5 Gbps for Serial ATA.
Along with the increase in communication speeds and a decrease in voltage, the amount of noise affecting signals has increased and as a result signals have become less tolerant of noise. As a result, noise countermeasures have become a serious issue for printed wiring boards (see Japanese Unexamined Patent Application Publications 11-316774 (reference document 1) and 3-250266 (reference document 2)).
Furthermore, wiring constraint instructions in wiring design such as limiting line length to reduce noise in printed wiring boards are a matter of course (see, for example, Japanese Unexamined Patent Application Publication 2001-184384 (reference document 3)).
Generally, the work of designing wiring for printed wiring boards is conducted by frequently redoing the wiring and modifying routes for assuring the line length limitations indicated by the wiring constraints. In traditional wiring design work for printed wiring boards, much effort was desired to design wiring that avoids various scenarios that add noise to signals and, as a result, bypass work to conduct wiring that avoids adding noise to signals was not performed.
Thus, previous wiring design work for printed wiring boards included much manual searching and repairing of various patterns that added noise to signals by the user after completing the wiring design work, to assure the line length limitations indicated by the wiring constraints.
After completing all the wiring design work to assure the line length limitations indicated in the wiring constraints, the various patterns that add noise to the signals need to be revised while maintaining the assured line length limitation conditions indicated by the wiring constraints when searching for and revising such patterns.
Previously in wiring design work, a user could manually search for and revise the patterns that added noise to signals since such patterns were few and the X and Y axes are considered for printed wiring boards that had one conductive layer or for printed wiring boards with low communication speeds.
However, for printed wiring boards that have multiple conductive layers, searching for and revising the various patterns (physical conditions) that add noise to signals by a user takes too much time due to the increase in parts that desire revising because of the increase in communication speeds and the increase in the scale of printed wiring boards.